(a) Complete the truth table to compare the outputs of the six standard two-input logic gates for the input combination A = 1, B = 0. Gate Output when A=1, ...
Question 1 Report
(a) Complete the truth table to compare the outputs of the six standard two-input logic gates for the input combination A = 1, B = 0.
| Gate | Output when A=1, B=0 |
|---|---|
| AND | |
| OR | |
| NAND | |
| NOR | |
| XOR | |
| XNOR |
[3]
(b) For each of the following output patterns (for all four input combinations 00, 01, 10, 11), name the gate.
(i) Output: 1, 1, 1, 0
[1]
(ii) Output: 0, 1, 1, 0
[1]
(iii) Output: 1, 0, 0, 0
[1]
(c) Explain why knowing these output patterns is useful when designing logic circuits.
[2]
Answer Details
(a) Complete the table of outputs for the six standard two-input logic gates when A = 1, B = 0. [3]
Each gate applies a different logical rule to its inputs:
| Gate | Rule | Output when A=1, B=0 |
|---|---|---|
| AND | Output is 1 only when both inputs are 1 | 0 |
| OR | Output is 1 when at least one input is 1 | 1 |
| NAND | Opposite of AND (NOT of AND) | 1 |
| NOR | Opposite of OR (NOT of OR) | 0 |
| XOR | Output is 1 when the inputs are different | 1 |
| XNOR | Output is 1 when the inputs are the same | 0 |
[0.5 per correct entry, 3 marks total]
(b) Name the gate for each output pattern (input combinations 00, 01, 10, 11). [3]
(i) Output: 1, 1, 1, 0. The only gate that outputs 0 solely when both inputs are 1 is the NAND gate. It is the inverse of AND, which outputs 1 only for (1,1). [1]
(ii) Output: 0, 1, 1, 0. The output is 1 only when exactly one input is 1 (not both, not neither). This is the XOR (exclusive OR) gate. [1]
(iii) Output: 1, 0, 0, 0. The only gate that outputs 1 solely when both inputs are 0 is the NOR gate. It is the inverse of OR: OR outputs 0 only for (0,0), so NOR outputs 1 only for (0,0). [1]
(c) Explain why knowing these output patterns is useful when designing logic circuits. [2]
Knowing each gate's full truth table allows a designer to match a desired logical function to the correct gate, avoiding trial-and-error. [1] It also enables verification: after building a circuit, the designer can test all input combinations against the expected pattern to confirm the circuit produces the correct output, which is essential for debugging. [1]
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