A NAND gate is a logic gate formed by combining an AND gate with an inverter, or NOT gate, on its output. To find its output for any combination of inputs, first work out what a plain AND gate would give, then flip that result.
An AND gate outputs 1 only when every one of its inputs is 1; for any other combination, it outputs 0. Since a NAND gate inverts this result, it outputs 0 only when every input is 1, and it outputs 1 for every other combination, meaning whenever at least one input is 0. In other words, the presence of a single 0 at any input is enough to force the NAND output to 1.
| Input A | Input B | NAND output |
|---|
| 0 | 0 | 1 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 0 |
A common error is assuming NAND behaves like AND and needs all inputs at 1 to output 1; it is actually the reverse, needing all inputs at 1 to output 0.
Exam takeaway: build the NAND truth table from AND, then invert every result, rather than trying to memorise NAND's behaviour separately from AND.
